Eyana the SSD Simulator

Eyana the SSD simulator is an innovative educational and research tool, the NAND flash memory cell (called floating gate transistor) and flash-based solid-state-drive (SSD) simulator, created to facilitate a comprehensive understanding of SSDs by providing students with a visual representation of the internal workings of SSDs and transistors NAND cells. Although there are existing simulators, they take a considerable amount of time for beginner users to understand and are difficult to understand deeply. Our research showcases the simulator’s profound impact on understanding SSD technology, significantly reducing learning time, and enhancing comprehension among students.

By offering an immersive visualization of NAND flash memory cells, single level cell (SLC), multi-level cell (MLC), and triple-level cell (TLC) structures, the simulator demystifies the storage and management of data within SSDs. The paper delves into SSD architecture and organization, encompassing pages, blocks, the flash translation layer (FTL), logical block mapping, wear leveling, and over-provisioning, providing an in-depth understanding of these fundamental components. Crucial SSD functionalities such as read, write, and erase operations, garbage collection, TRIM, and their roles in maintaining SSD performance are clarified. Moreover, the research explores advanced functionalities, parallelism strategies and allocation methods (dynamic and static allocation). Our simulators are able to extend data placement policies such as Multi-streamed, Zoned Namespaces, Flexible Data Placement, etc.

Feedback from a survey involving over thousand students and researchers validates the simulator’s effectiveness in improving SSD comprehension and learning speed. This paper also outlines potential applications in industry settings, underlining the simulator’s utility for professionals and students. Our innovative simulator not only enhances SSD understanding but also contributes to the pedagogical landscape by visualizing the complexities of SSDs, streamlining the learning process, and fostering a robust foundation in computer architecture and storage technologies.

Author and Developers

Habibur Rahman / jaeho Kim / Omar Farouqe